NXP PCA9641PWJ

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Overview

The PCA9641PWJ is a 2-to-1 I²C master demultiplexer with an arbiter function. It is designedfor high reliability dual master I²C-bus applications where correct system operation isrequired, even when two I²C-bus masters issue their commands at the same time. Thearbiter will select a winner and let it work uninterrupted, and the losing master will takecontrol of the I²C-bus after the winner has finished. The arbiter also allows for queuedrequests where a master requests the downstream bus while the other master hascontrol.

An active LOW reset input allows the PCA9641A to be initialized. Pulling the RESET pinLOW resets the I²C-bus state machine and configures the device to its default state asdoes the internal Power-On Reset (POR) function.

Features

Applications

• Protection Switching
• Loopback
• Clock Distribution
• Servers
• Industrial PCs
• Test Equipment
• Desktop Computers
• Laptop Computers (for External Video Cards)
• Communications Switchers
• Storage Area Networks