Freescale PCA9512AD

Буфер, ускоритель2-проводная шина2-проводная шина400 кГц1

Overview

The PCA9512A/B is a hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses and includes two dedicated supply voltage pins to provide level shifting between 3.3 V and 5 V systems while maintaining the best noise margin for each voltage level. Either pin may be powered with supply voltages ranging from 2.7 V to 5.5 V with no constraints on which supply voltage is higher. Control circuitry prevents the backplane from being connected to the card until a stop bit or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9512A/B provides bidirectional buffering, keeping the backplane and card capacitances isolated.

and benefits■ Bidirectional buffer for SDA and SCL lines increases fan-out and prevents SDA and SCL corruption during live board insertion and removal from multipoint backplane systems■ Compatible with I2C-bus Standard mode, I2C-bus Fast mode, and SMBus standards■ Built-in ΔV/Δt rise time accelerators on all SDA and SCL lines (0.6 V threshold) with ability to disable ΔV/Δt rise time accelerator through the ACC pin for lightly loaded systems, requires the bus pull-up voltage and respective supply voltage (VCC or VCC2) to be the same■ 5 V to 3.3 V level translation with optimum noise margin■ High-impedance SDAn and SCLn pins for VCC or VCC2 = 0 V■ 1 V precharge on all SDAn and SCLn pins■ Supports clock stretching and multiple master arbitration and synchronization■ Operating power supply voltage range: 2.7 V to 5.5 V■ 0 Hz to 400 kHz clock frequency■ ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per JESD22-C101■ Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA■ Packages offered: SO8, TSSOP8 (MSOP8)

Features